STM32 的UART數(shù)據(jù)寄存器是9位，數(shù)據(jù)傳輸先傳低位(LSB)

--實(shí)際應(yīng)用發(fā)現(xiàn)9位數(shù)據(jù)大時(shí)候有丟包錯(cuò)包問題??

利用USART可以進(jìn)行多機(jī)處理器通信，其原理就是使從機(jī)處于靜默模式，由主機(jī)在需要的時(shí)候發(fā)送指令喚醒從機(jī)，并傳輸數(shù)據(jù)。STM32靜默模式特點(diǎn)：1、所有接收狀態(tài)位都不會(huì)被設(shè)置;2、所有的接收中斷都被禁止;3、USART_CR1寄存器中的RWU位被置1，RUW可以硬件自動(dòng)控制或者在某些條件下由軟件寫。

連接方法很簡(jiǎn)單，主機(jī)的TX輸出與從機(jī)的RX端口直接相連，從機(jī)TX端口要經(jīng)過與門與主機(jī)RX端口連接。

多機(jī)通信方式有2種：空閑幀喚醒和地址喚醒。

空閑幀喚醒可以同時(shí)喚醒所有從機(jī)，在從機(jī)處于靜默模式時(shí)發(fā)送空閑幀(即所有位均為1的數(shù)據(jù))，喚醒多個(gè)從機(jī)，實(shí)現(xiàn)多個(gè)從機(jī)同步。

地址喚醒可以喚醒單個(gè)從機(jī)，從機(jī)靜默時(shí)發(fā)送地址幀，從機(jī)自動(dòng)對(duì)比地址，地址配對(duì)正確則該從機(jī)喚醒，否則繼續(xù)進(jìn)入靜默。這樣只有被尋址者才被激活，來(lái)接收數(shù)據(jù)，減少由未被尋址的接收機(jī)器參與帶來(lái)的多余的USART服務(wù)開銷。這種模式下，MSB為1的字節(jié)被認(rèn)為是地址，否則被認(rèn)為是數(shù)據(jù)(MSB一般為數(shù)據(jù)傳送的最高位，8位傳送則MSB為第八位;9位傳送則MSB為第九位)。在一個(gè)地址字節(jié)中，目標(biāo)接收者的地址放在低4位。這4位會(huì)被接收器拿來(lái)和設(shè)置在USART_CR2寄存器中ADD位中的自身地址比較。當(dāng)接收到一個(gè)和設(shè)置地址相匹配的地址字符時(shí)，RWU被清除，后面的字節(jié)將正常接收。因?yàn)镽WU位已經(jīng)被清除，RXEN位會(huì)因?yàn)榻邮盏降刂贩恢?。當(dāng)從機(jī)再次接收到地址符，如若地址不匹配則從機(jī)再次進(jìn)入靜默模式。

程序?qū)嶋H編寫時(shí)可以注意以下3部分的設(shè)置：

一、設(shè)置靜默模式：

函數(shù)原形

void USART_WakeUpConfig(USART_TypeDef* USARTx, u16 USART_WakeUp)

其中USART_WakeUp：USART的喚醒方式：

1、USART_WakeUp_IdleLine 空閑總線喚醒

2、USART_WakeUp_AddressMark 地址標(biāo)記喚醒

二、地址喚醒中地址設(shè)置：

函數(shù)原形

void USART_SetAddress(USART_TypeDef* USARTx, u8 USART_Address)

其中USART_Address：是設(shè)置USART 節(jié)點(diǎn)的地址。

例如：USART_SetAddress(USART2, 0x5);

三、是否進(jìn)入靜默：

函數(shù)原形

void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState Newstate)

其中NewState: USART 靜默模式的新狀態(tài)這個(gè)參數(shù)可以取：ENABLE或者DISABLE。

Address mark detection (WAKE=1)

In this mode, bytes are recognized as addresses if their MSB is a ‘1 else they are

considered as data. In an address byte, the address of the targeted receiver is put on the 4

LSB. This 4-bit word is compared by the receiver with its own address which is programmed

in the ADD bits in the USART_CR2 register.

The USART enters mute mode when an address character is received which does not

match its programmed address. In this case, the RWU bit is set by hardware. The RXNE flag

is not set for this address byte and no interrupt nor DMA request is issued as the USART

would have entered mute mode.

It exits from mute mode when an address character is received which matches the

programmed address. Then the RWU bit is cleared and subsequent bytes are received

normally. The RXNE bit is set for the address character since the RWU bit has been cleared.

The RWU bit can be written to as 0 or 1 when the receiver buffer contains no data (RXNE=0

in the USART_SR register). Otherwise the write attempt is ignored.

Bit 1 RWU: Receiver wakeup

This bit determines if the USART is in mute mode or not. It is set and cleared by software

and can be cleared by hardware when a wakeup sequence is recognized.

0: Receiver in active mode

1: Receiver in mute mode

Note: 1: Before selecting Mute mode (by setting the RWU bit) the USART must first receive a

data byte, otherwise it cannot function in Mute mode with wakeup by Idle line detection.

2: In Address Mark Detection wakeup configuration (WAKE bit=1) the RWU bit cannot

be modified by software while the RXNE bit is set.

Bit 11 WAKE: Wakeup method

This bit determines the USART wakeup method, it is set or cleared by software.

0: Idle Line

1: Address Mark

“logically ANDed ” 指的是邏輯上的關(guān)系。某些情況下，不需要另外加與門電路。

比如：板上有3個(gè)STM32，1主2從，中間未加電平變換芯片(直連)，從機(jī)的發(fā)送腳都配置成open drain輸出并帶上拉，這種情況下2個(gè)從STM32芯片的TX腳可以 直接連到主STM32芯片的RX腳。

如果用了電平變換芯片比如MAX232，一般需要另外加與門電路。