中圖分類號： TN91 文獻(xiàn)標(biāo)識碼： A DOI：10.16157/j.issn.0258-7998.211493 中文引用格式： 張萬榮，王飛虎. 新型PD協(xié)議芯片BMC解碼電路的設(shè)計與驗證[J].電子技術(shù)應(yīng)用，2021，47(11)：29-32，38. 英文引用格式： Zhang Wanrong，Wang Feihu. Design and verification of BMC decoding circuit for new PD protocol chip[J]. Application of Electronic Technique，2021，47(11)：29-32，38.
Design and verification of BMC decoding circuit for new PD protocol chip
Zhang Wanrong，Wang Feihu
Faculty of Information Technology，Beijing University of Technology，Beijing 100000，China
Abstract： This paper presents a new type of biphase mark coding(BMC) decoding circuit for PD protocol chip. Based on the traditional BMC decoding circuit, firstly, the counter is separated from the decoding module, and a state machine is added in the decoding module. By changing the jump condition of the state machine, the BMC signal with single bit period mutation of 25% is decoded. Then, a finite impulse response(FIR)filter is added to make the threshold value change linearly with the value of Cnt, so that the BMC signal with multiple continuous cycles can be decoded. Finally, the Verilog Compiled Simulator of Synopsys company is used for simulation verification, which proves that the new scheme can decode two adjacent BMC signals with a period difference of 25%, and decode ten consecutive BMC signals with a period increase of 6.25%.
Key words : BMC decoding；USB PD protocol；FIR；fast charging protocol chip
0 引言
近年來，隨著移動設(shè)備快速充電功率的不斷提高，USB標(biāo)準(zhǔn)化組織(Universal Serial Bus Implementers Forum，USB-IF)制定了基于BMC編碼的USB功率傳輸(Universal Serial Bus Power Deliver，USB PD)3.0協(xié)議，該協(xié)議相比于Qualcomm公司的快速充電(Quick Charge，QC)協(xié)議、Samsung公司的自適應(yīng)快速充電(Adaptive Fast Charge，AFC)協(xié)議等快充協(xié)議具有只占用一根通信線，協(xié)議內(nèi)容可拓展性強等優(yōu)點，已成為應(yīng)用最廣的快充協(xié)議[1-3]。BMC解碼模塊是USB PD 3.0協(xié)議芯片的核心模塊[4-6]。隨著手機快充功率突破120 W，峰值電流可達(dá)到6.25 A，電流大范圍變化帶來的地電位漂移現(xiàn)象愈發(fā)嚴(yán)重，地電位漂移導(dǎo)致BMC信號在傳輸過程中周期多次連續(xù)變化使得BMC信號周期累計變化范圍可達(dá)3.3 μs的±30%[7]；隨著USB線中數(shù)據(jù)傳輸速率提高到20 Gb/s使，USB線包內(nèi)的電磁環(huán)境更加惡劣，從而使得BMC信號在傳輸過程中受到大量高頻噪聲干擾而導(dǎo)致周期單次大幅度突變[8]。為解決上述問題，近年來人們提出了一些對BMC解碼模塊優(yōu)化的方案，文獻(xiàn)[9]提出了一種解碼電路能夠成功解碼周期在3.3 μs±25%范圍內(nèi)變化的BMC信號，但是當(dāng)BMC信號周期累計變化到±30%時不能成功解碼，而是通過錯誤反饋機制強制USB PD 3.0協(xié)議芯片回到初始狀態(tài)。
